Systems in Package(SiP) | ASIC and sub-system design | Multi-band Radios and Antennas | Communication Systems
System in a Package (SiP)
There is ever-growing demand for electronic systems and subsystems with increasing functionality, higher performance, smaller form factor and lower cost. These requirements translate to higher level microelectronic fabrication and packaging challenges. In this scenario, system-in-a-package (SiP) modules are consistently proving to be an alternative packaging solution to system-on-a-chip (SoC), providing the additional benefit of early time to market. As a packaging technology platform, SiP allows a high degree of flexibility in the package architecture with embedded passives, particularly for radio frequency (RF) applications.
At Si2 Microsystems, all activities revolve around the SiP technology, which convert processed silicon chips to optimally integrated functional micro-systems with a judicious mix of innovative substrate design, compatible material / package choices and advanced SMT technology.
SIP technology brings with it -
High level of performance by providing optimum integration for digital, logic and RF functions and passive elements; Si2 provides custom designed substrates with embedded passives in wide variety of materials (custom Ceramic, LTCC, DBC, IMC, FR-4, BT, etc.). Substrate manufacturing is outsourced.
Efficient interconnect technology to minimize the parasitic effects both at chip / substrate level and the package / system board level; Si2 has advanced CAD tools for electrical and thermal modeling and design optimization of parasitics, EMI, crosstalk, etc. through right choice of packages, interface materials and assembly approaches).
Low system costs by eliminating multiple packages for individual chips, while leveraging the existing packaging and SMT assembly manufacturing infrastructure; Si2 has an advanced manufacturing line involving different substrates (laminate, ceramic, lead-frame, etc.) including multiple die-attach capabilities with high precision, wide choice of wire bond options, flip chip technology, ball-attach line, micro-BGA and other chip scale packaging. Further, it has a well proven, advanced, RoHS compliant SMT line running high volume memory modules, thus providing access to state-of-the-art board level assembly.
Smaller form factors through integration of active devices in die or CSP form and embedded passives; At Si2, experts mix experience with innovation to provide the cost effective mix of all current semiconductor assembly and packaging technologies.
Quicker time-to-market, as the system design, tuning and debugging are done at the substrate level, unlike SoC, which requires mask set re-design and wafer process re-spin for every iteration;
At Si2 Microsystems, this is the single driving force in design and package architecture optimization so that the optimum SOLUTION is DELIVERED for a given product.
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