ASiP | FSiP | ODM
Business Model
ASiPs are delivered as turnkey solutions – starting from Architectural Concept to Design to Prototyping, Qualification & Final Production. All turnkey solutions are application specific and customer driven. We undertake complete architectural responsibility for co-designing the solution leveraging our ASIC, System Design and SiP Technology strengths to optimize customer needs
We engage customers at critical milestone sign-offs to ensure minimal design changes and also to ensure first time success. Our commercial package would include both development and production costs. We will work with customers and create an attractive commercial package optimized for the required form-factor, performance at the least possible investment for a mutually beneficial business relationship.
Technology
Substrate Engineering – This involves selection of appropriate substrates like FR-4, BT, Alumina, Ceramic, IMC, DBC, etc. depending on the technology and cost requirements of the final solution. We have in house technology and library for embedding passives, varieties of filters, etc. primarily for RF designs. However, we outsource the LTCC manufacturing to vendors like Kyocera, Anaren, etc.
ASIC & FPGA design is done using traditional methods and are mostly digital. The primary objective is to meet customers’ integration, cost, and time to market needs. SiP technology allows freedom from long drawn ASIC design cycles. The combined methodology of using ASIC design and standard components through value added system engineering provides the most optimal solution.
Tools – Our design team has a thorough knowledge of the complete design methodology of SiP implementation and has the required amount of exposure with the whole range of software tools. For ASIC design, we follow the standard Cadence, Synopsys or Magma tool flow. For PCB design, SI/EM analysis, we use Cadence’s Allegro and Sigrity’s SpeedXP respectively. For Package layout, we use Sigrity’s UPD and for RF design and SI/EM analysis, we use AWR and Sigrity’s SpeedXP respectively. For thermal analysis, we have expertise in using Optimal, Icepack tool sets. Our hardware lab is equipped for advanced antenna and RF microsystem design.
Si2 has built streamlined project management teams with risk mitigation, exceptional design capabilities, strong vendor development skills, etc.
1. Design Methodology:
Si2 follows the Industry Standard design methodology for successful delivery of critical programs to customers. The reliability is “designed in” by using FEM techniques at chip level, package level, and process level.
2. Design Team:
Si2 has established design teams with over a decade of experience in Defense, Aerospace & Medical Electronics, who are well versed with the industry standard tools and related processes.
a) System Design – Multi technologies: Mixed Signal, Analog & Digital
b) VLSI & ASIC design
c) Thermal, Cross Talk, Signal Integrity & Reliability design
d) MIL / Aerospace Standards
e) SiP implementation & Advanced Packaging design
f) RF & Antenna design
3. Packaging:
Si2 has in-house advanced package design capability. We use Ceramic and Plastic Packaging Technologies & Pre-molded technologies including PGA, LCC, BGA, CSP, LTCC, PBGA, Stacked Die, QFN, SDIO, USB, etc.
4. Testing:
Si2 places a lot of emphasis on first time success of its solutions with very high first pass yield output. Extensive simulation is carried out during the design process before design actualization of the intended solution. The quest for perfection in the design stage is complemented by extensive test facility in the Si2 production floor for the products coming out of the manufacturing line that has been aligned with the rest of the process to yield products that pass 100% of the test vectors.
Si2’s testing philosophy encompasses functional, parametric and post assembly Go/No-Go inspections. Functional testing is done with the help of custom test benches depending on the product to be tested. For parametric testing, industry standard test sets are employed and for post assembly inspection, advanced optical, X-ray technology based instruments are used apart from the standard techniques like Bed of Nails, ICT (In-Circuit Testing), etc. The testing methodology employed at Si2 is capable of handling JTAG based testing.
Si2 has relationships with third-party houses for functional test, MIL and Rad-hard qualification.
Manufacturing Infrastructure
Si2 has a captive state-of-the-art fully automated chip level assembly line which includes precision and highly flexible die bonders to handle wide variety of base structures (ceramic, laminate or lead frame), fast and precision wire bonders with full flexibility to handle the special needs of stacked die approach (Au, Al and Cu wires/ribbons), flip chip handling options, ball-attach and micro-BGA assembly line, molding and hermetic packaging line, etc. The process parameters in the manufacturing line are evolved carefully through continuous line and process qualification procedures and these data form the strict guidelines at the design stage.
85 Great Oaks Boulevard, San Jose, CA 95119 Tel: (408) 360-9100 Fax: (408) 360-9170 info-usa@si2micro.com
#84, EPIP, Whitefield Industrial Area, Bangalore 560 066 Tel:+91 80 67171100 Fax: +91 80 28413632 info-india@si2micro.com